Article Preview
Top1. Introduction
In a communication system, ECC and modulation are two separate blocks. ECC reduces false reception by adding some redundant bits with the input data; although it requires large B.W., it improves BER performance. Modulation is also the critical block because here, low-frequency base band signal mapped onto high-speed carrier signal after changing any of the parameters of carrier signal like amplitude, phase, or Frequency. ECC is the digital process, and modulation is the analog. TCM is the combined process of error ECC and modulation. The encoder used in TCM is the convolution encoder with 8PSK multilevel modulation. Today's world is the wireless communication world. Many online/offline applications are based on wireless communication, and high-speed modems play a significant role in such applications. Trellis Coded Modulation TCM is the most suited modulation for the modems. Modem stands for modulator and demodulator combined in a system.
This multidimensional trellis-coded modulation is most prevalent where the bandwidth of the channel is limited, for example, communication between remote satellites and Earth stations. It is efficient in both aspects, power efficiency and bandwidth efficiency for a given application.
Here a design of low power 4D 8PSK decoder for satellite applications is suggested.The CCSDS (Petrobon, 1990) is an international organization that sets the standards for satellite data transmission.
Table 1.
CCSDS Recommendation for different frequency bands
| Frequency Band | Applicable Recommendation | Recommended Modulations |
2200-2290 MHz
8450-8500 MHz | 401 (2.4.17A) B-1 | • GMSK BTs=0.25 with precoding
• FQPSK-B
• Filtered OQPSK |
2290-2300 MHz
8400-8450 MHz | 401 (2.4.17B) B-1 | • GMSK BTs=0.5 with precoding
• T-OQPSK |
| 8025-8400 MHz | 401 (2.4.18) B-1 | • 4D-8PSK-TCM |
Committee describes that a multidimensional trellis-based modulation, 4D 8PSK TCM is suitable for 8 GHz to 8.4 GHz range. The system parameters for this band, like transmission rate, mapping equations, description of the convolutional encoder, and differential encoder, are also suggested in norms.
This system is used for high data rate transmission; the decoder must work with a high clock frequency. It should be able to achieve peak data rates of 1 Gbits/s. I tried to keep this decoder as simple and low power consumption as far as possible so it can be integrated on available FPGA.