Design of Common Gate Current-Reuse Noise Cancellation UWB Low Noise Amplifier in 90nm CMOS

Design of Common Gate Current-Reuse Noise Cancellation UWB Low Noise Amplifier in 90nm CMOS

Rashmi Seethur, Siva Yellampalli, Shreedhar H. K.
DOI: 10.4018/IJECME.312257
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Abstract

In this paper, an ultra-wide band (UWB) low noise amplifier (LNA) is implemented by using 90nm RF CMOS technology. The designed LNA achieves high flat band gain (S21) and low noise figure (NF) in the frequency of interest. The proposed LNA operates in the frequency range of 3GHz to 8GHz. In this work, wide band matching is achieved by designing common gate configuration at the input stage. The current reuse and noise cancellation techniques are introduced to improve flat band gain and minimize both noise figure and power consumption. The noise figure is improved by cancelling dominant noise sources with additional hardware. The proposed LNA attains flat band gain of 26.5dB and input matching less than -12dB for entire UWB band. This work achieves noise figure of 2.1dB to 2.59dB in frequency band of interest. Additionally, power consumption of the circuit is 20mW at 1.8V supply voltage.
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1. Introduction

UWB transceiver (Razavi, 2013) design is gaining higher priority in the last decade to satisfy the demand of different wireless communication devices. One of the critical blocks of UWB receiver is Low Noise Amplifier. The UWB LNA should satisfy few basic requirements such as higher flat band power gain (S21), wide band input matching (S11), reduced noise figure (NF), low power consumption, unconditional stability, improved linearity and reduced area.

Simultaneous achievement of all the design requirements of LNA is very critical because of trade-off between these performance parameters of LNA. LNA design is broadly classified in to two categories based on noise figure specification and input matching requirement such as common source and common gate topology as depicted in figure 1. The common source amplifier with resistive termination is shown in figure 1a. This circuit is one of the solutions for achieving larger band width. Inclusion of resistor at the input leads to increase in minimum noise figure. The common source amplifier with inductive degeneration (CSID) shown in figure 1c is another solution for wide band LNA for achieving low noise figure. Under matched condition the quality factor of CSID is very small. This makes CSID architecture more suitable for narrow band application. To improve the bandwidth, the source inductance needs to be very high which in-turn increases the chip area. The common source LNA with resistive feedback (Meaamar et al., 2010; Perumana et al., 2008) is shown in figure 1d.

Figure 1.

Wide band LNA architectures a) CS b) CG c) CS with inductive source degeneration d) resistive feedback

IJECME.312257.f01

This circuit is primarily used to achieve wide band matching with reduced noise figure. This feedback resistor contributes more noise and increases the minimum noise figure. The common gate (Arshad et al., 2013; Chen et al., 2008; Dehqan et al., 2012; Liscidini et al., 2006) LNA is shown in figure 1b. This is straightforward method to achieve wide band matching in LNA design. Input impedance of CG LNA is 1/gm. By approximately adjusting the transconductance it is easy to achieve wide band matching in UWB LNA. On the other hand, the noise figure of CG LNA is more compared to CS LNA because of reduced power gain. In this paper, designed LNA uses two stages of amplification to improve gain and additional two more stages are used in secondary path to apply noise cancellation technique to achieve minimum noise figure. Finally at the output buffer stage is incorporated. Among the two amplification stages, first stage is designed by using common gate topology to achieve wide band input matching at reduced area. Second stage uses cascode common source current reuse topology to achieve elevated flat power gain with minimum power consumption. The final stage uses source follower for output matching and which acts as buffer stage. Noise cancellation stage consist of cascaded common source structure to cancel dominant noise sources.

The paper is organized as follows: section 2 describes the circuit diagram of the proposed LNA. Section 3 describes design of different performance metrics of LNA. Simulation results of proposed LNA is dealt in section 4. Section 5 deals with conclusion and future work.

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