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Recent years have seen the utility of object detection being recognized in modern video processing systems for important tasks such as surveillance, advance driver assistance and urban monitoring etc. Thus, various feature-classifier algorithms and their corresponding implementation schemes on both hardware and software platforms have been proposed and discussed at length by various researchers in the contemporary literature (Cao, Pang, & Li, 2017; Kyrkou, Bouganis, Theocharides, & Polycarpou, 2016; Rettkowski, Boutros, & Göhringer, 2017; Shen, Zuo, Li, Yang, & Ling, 2017; Z. Zhang, He, Cao, & Cao, 2016). Among this variety of approaches, the Convolutional Neural Network (CNN) or Deep Learning (DL) based detectors (Ribeiro, Nascimento, Bernardino, & Carneiro, 2017) have occupied the top place in terms of accuracy in the recent years. However, these top performing techniques require an equivalently high computational cost at the run-time. Moreover, these algorithms have been generally developed without regard for deployment on small embedded systems with limited memory, computational resources and energy sources. The sheer complexity of such systems requires the necessity to engage high-performing dedicated Graphical Processing Units (GPU) even on conventional desktop computer. It is due to this reason that despite appearance of a few low-complexity versions (Ren, He, Girshick, & Sun, 2015; L. Zhang, Lin, Liang, & He, 2016), DL-based solutions have yet to see widespread appeal for embedded systems. Furthermore, the dedicated hardware implementation of CNN on FPGA systems requires extensive effort in design and deployment. The problem is exacerbated when newer neural networks need to be incorporated which leads to redesign from scratch. Resultantly, the system-level design of larger computer vision systems demands considerably more time and effort to be spent on the implementation of object detection task alone. Thus, the conventional low-complexity hand-crafted features e.g. Histogram of oriented Gradients (HOG) and Local Binary Pattern (LBP), etc., are still favored by the hardware designers and the embedded system developers (Bilal, 2017; Bilal, Khan, Khan, & Kyung, 2016; Rettkowski et al., 2017) alike. This is the reason that commonly used image processing software libraries such as OpenCV (Bradski, 2000) and Matlab Computer Vision Toolbox (“The Mathworks Simulink”) still support object detection through HOG features and supply corresponding linear Support Vector Machine (SVM) models for classification. The hardware acceleration of these algorithms, however, still requires manual design due to the lack of automated high-level synthesis support for these features. FPGA synthesis tools such as Xilinx Vivado do not include intrinsic modules to support such functionality as well. Although a few research works have employed high-level synthesis tools to develop custom hardware for object detection task, a complete framework for training, testing and hardware deployment of feature-classifier setup is still missing. In this regard, this paper describes a high-level synthesis framework for FPGAs to generate Intellectual Property (IP) core for object detection using low-complexity features in Matlab/Simulink environment. The proposed framework allows the system designers to use object detection feature while developing computer vision systems at the highest abstraction level using common Simulink blocks. The framework can be used to train corresponding SVM models for different objects and realize software-based classification in combination with the developed synthesized hardware as a Hardware-Software (HW-SW) Co-design on an FPGA platform. Thus, all the essential tasks of an object detection task, i.e. training, testing and hardware deployment, can be carried out using a single framework. The source codes for the proposed framework can be downloaded as open-source software1. These contributions can be summarized as follows: